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PE4245
Product Specification
Evaluation Kit
The SPDT Switch Evaluation Kit board was
Figure 12. Evaluation Board Layouts
Peregrine Specification 101/0085
designed to ease customer evaluation of the
PE4245 SPDT switch. The RF common port is
connected through a 50 ? transmission line to the
top left SMA connector, J1. Port 1 and Port 2 are
connected through 50 ? transmission lines to the
top two SMA connectors on the right side of the
board, J2 and J3. A through transmission line
connects SMA connectors J4 and J5. This
transmission line can be used to estimate the loss
of the PCB over the environmental conditions
being evaluated.
The board is constructed of a two metal layer FR4
material with a total thickness of 0.031”. The
bottom layer provides ground for the RF
transmission lines. The transmission lines were
designed using a coplanar waveguide with ground
plane model using a trace width of 0.0476”, trace
gaps of 0.030”, dielectric thickness of 0.028”,
metal thickness of 0.0021” and ε r of 4.4.
J6 provides a means for controlling DC and digital
inputs to the device. Starting from the lower left
pin, the second pin to the right (J6-3) is connected
to the device CTRL input. The fourth pin to the
right (J6-7) is connected to the device V DD input.
Figure 13. Evaluation Board Schematic
Peregrine Specification 102/0110
Document No. 70-0104-07 │ www.psemi.com
?2003-2009 Peregrine Semiconductor Corp. All rights reserved.
Page 5 of 8
Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com
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